TISP9110LDMR-S【PDF 1/5 页】SURGE PROT THYRIST NEG/POS SLIC

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TISP9110LDM

INTEGRATED COMPLEMENTARY BUFFERED-GATE SCRS

FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION

TISP9110LDM Overvoltage Protector

High Performance Protection for SLICs with +ve and -ve

Battery Supplies

8-SOIC (210 mil) Package (Top View)

– Wide -110 V to +110 V Programming Range

– Low 5 mA max. Gate Triggering Current

(Tip or Ring) Line

– Dynamic Protection Performance Specified for

International Surge Waveshapes

(-V (BAT) )

(+V (BAT) )

Ground

Applications include:

– Wireless Local Loop

(Ring or Tip) Line

– Access Equipment

– Regenerated POTS

– VOIP Applications

NC - No internal connection

Terminal typical application names shown in

parenthesis

MD-8SOIC(210)-003-a

Rated for International Surge Wave Shapes

Wave Shape

2/10

10/700

10/1000

Standard

GR-1089-CORE

ITU-T K.20/21/45

GR-1089-CORE

I PPSM

100

Device Symbol

Line

............................................... UL Recognized Component

Description

The TISP9110LDM is a programmable overvoltage protection

device designed to protect modern dual polarity supply rail

ringing SLICs (Subscriber Line Interface Circuits) against

overvoltages on the telephone line. Overvoltages can be caused

by lightning, a.c. power contact and induction. Four separate

protection structures are used; two positive and two negative to

provide optimum protection during Metallic (Differential) and

Longitudinal (Common Mode) protection conditions in both

polarities. Dynamic protection performance is specified under

typical international surge waveforms from Telcordia GR-1089-

CORE, ITU-T K.44 and YD/T 950.

Ground

Line

SD-TISP9-001-a

The TISP9110LDM is programmed by connecting the G1 and G2

gate terminals to the negative (-V (BAT) ) and positive (+V (BAT) )

SLIC Battery supplies respectively. This creates a protector operating at typically +1.4 V above +V (BAT) and -1.4 V below -V (BAT) under a.c.

power induction and power contact conditions. The protector gate circuitry incorporates 4 separate buffer transistors designed to provide

independent control for each protection element. The gate buffer transistors minimize supply regulation issues by reducing the gate current

drawn to around 5 mA, while the high voltage base emitter structures eliminate the need for expensive reverse bias protection gate diodes.

The TISP9110LDM is rated for common surges contained in regulatory requirements such as ITU-T K.20, K.45, Telcordia GR-1089-CORE,

YD/T 950. By the use of appropriate overcurrent protection devices such as the Bourns ? Multifuse ? and Telefuse ? devices, circuits can be

designed to comply with modern telecom standards.

How To Order

Device

TISP9110LDM

Package

8-SOIC (210 mil)

Carrier

Embossed Tape Reeled

Order As

TISP9110LDMR-S

Marking Code

9110L

Standard Quantity

2000

*RoHS Directive 2002/95/EC Jan 27 2003 including Annex

AUGUST 2004 – REVISED JANUARY 2007

Specifications are subject to change without notice.

Customers should verify actual device performance in their specific applications.

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